A New Characterization Method for Delay and Power Dissipation of Standard Library Cells
نویسندگان
چکیده
A simplified method for characterization of standard library cells based on the linear delay model is presented in this paper. The linear model is chosen as it allows rapid characterization with a modest number of simulations, while achieving acceptable accuracy. All the parameters of cell delays are defined as 50%-to-50% delays, as distinguished from 50%-to-threshold or threshold-to-50% often used in commercial tools. We found that the 50%-to-50% definition of delays is more consistent and leads to closed-form formula. A subset of library cells in a 0.25mm technology was characterized using the proposed technique. A test circuit was subsequently generated and simulated to determine the accuracy of the proposed characterization method. SPICE simulations on the test circuit show that the timing estimations obtained through the proposed method is accurate to within 5.6%, and the power estimation was accurate to 4.2%, ignoring parasitics on interconnections.
منابع مشابه
The Effect of DTMOS Transistors on the Performance of a Memristor-based Ternary CAM Cell in Low Power Applications
This paper proposes the use of DTMOS transistors in a memristor-based ternary CAM (MTCAM) instead of MOSFET transistors. It also evaluates the effect of forward body biasing methods in DTMOS transistors on the performance of a MTCAM cell in write mode. These biasing methods are gate-to-body tying (called DT1), drain-to-body tying (called DT2), and gate-to-body tying with a voltage supply of 0.1...
متن کاملTaguchi Approach and Response Surface Analysis for Design of a High-performance Single-walled Carbon Nanotube Bundle Interconnects in a Full Adder
In this study, it was attempted to design a high-performance single-walled carbon nanotube (SWCNT) bundle interconnects in a full adder. For this purpose, the circuit performance was investigated using simulation in HSPICE software and considering the technology of 32-nm. Next, the effects of geometric parameters including the diameter of a nanotube, distance between nanotubes in a bundle, and ...
متن کاملDevice and Circuit Performance Simulation of a New Nano- Scaled Side Contacted Field Effect Diode Structure
A new side-contacted field effect diode (S-FED) structure has beenintroduced as a modified S-FED, which is composed of a diode and planar double gateMOSFET. In this paper, drain current of modified and conventional S-FEDs wereinvestigated in on-state and off-state. For the conventional S-FED, the potential barrierheight between the source and the channel is observed to b...
متن کاملAn Innovative Methodology for the Design Automation of Low Power Libraries
A new methodology for the design of low-power standard cell libraries is presented. The proposed approach addresses power consumption at various steps in the design flow, applying new design automation algorithms and incorporating innovative cell designs. CAD techniques are used to speed development of the library, allowing for quick analysis of power and delay characteristics, with subsequent ...
متن کاملOptimized Standard Cell Generation for Static CMOS Technology
Fabrication of an integrated circuit with smaller area, besides reducing the cost of manufacturing, usually causes a reduction in the power dissipation and propagation delay. Using the static CMOS technology to fabricate a circuit that realizes a specific logic function and occupies a minimum space, it must be implemented with continuous diffusion runs. Therefore, at the design stage, an Euleri...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید
ثبت ناماگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید
ورودعنوان ژورنال:
- VLSI Design
دوره 2002 شماره
صفحات -
تاریخ انتشار 2002